«VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELGAUM III SEMESTER ENGINEERING MATHEMATICS – III CODE: 10 MAT 31 IA Marks: 25 Hrs/Week: 04 Exam Hrs: 03 ...»
Handle the STACK Empty and STACK Full conditions. Also display the contents of the stack after each operation, by overloading the operator.
8. Design, develop, and execute a program in C++ to create a class called LIST (linked list) with member functions to insert an element at the front of the list as well as to delete an element from the front of the list. Demonstrate all the functions after creating a list object.
9. Design, develop, and execute a program in C to read a sparse matrix of integer values and to search the sparse matrix for an element specified by the user. Print the result of the search appropriately.
Use the triple row, column, value to represent an element in the sparse matrix.
10. Design, develop, and execute a program in C to create a max heap of integers by accepting one element at a time and by inserting it immediately in to the heap. Use the array representation for the heap. Display the array at the end of insertion phase.
12. Design, develop, and execute a program in C++ to create a class called DATE with methods to accept two valid dates in the form dd/mm/yy and to implement the following operations by overloading the operators + and -. After every operation the results are to be displayed by overloading the operator.
i. no_of_days = d1 – d2; where d1 and d2 are DATE objects, d1 =d2 and no_of_days is an integer.
ii. d2 = d1 + no_of_days; where d1 is a DATE object and no_of_days is an integer.
13. Design, develop, and execute a program in C++ to create a class called OCTAL, which has the characteristics of an octal number.
Implement the following operations by writing an appropriate constructor and an overloaded operator +.
i. OCTAL h = x ; where x is an integer ii. int y = h + k ; where h is an OCTAL object and k is an integer.
Display the OCTAL result by overloading the operator. Also display the values of h and y.
14. Design, develop, and execute a program in C++ to create a class called BIN_TREE that represents a Binary Tree, with member functions to perform inorder, preorder and postorder traversals.
Create a BIN_TREE object and demonstrate the traversals.
Note: In the examination each student picks one question from a lot of all the 14 questions.
1. a) Design and construct a suitable circuit and demonstrate the working of positive clipper, double-ended clipper and positive clamper using diodes.
b) Demonstrate the working of the above circuits using a simulation package.
2. a) Design and construct a suitable circuit and determine the frequency response, input impedance, output impedance, and bandwidth of a CE amplifier.
b) Design and build the CE amplifier circuit using a simulation package and determine the voltage gain for two different values of supply voltage and for two different values of emitter resistance.
3. a) Design and construct a suitable circuit and determine the drain characteristics and transconductance characteristics of an enhancement-mode MOSFET.
b) Design and build CMOS inverter using a simulation package and verify its truth table.
4. a) Design and construct a Schmitt trigger using Op-Amp for given UTP and LTP values and demonstrate its working.
b) Design and implement a Schmitt trigger using Op-Amp using a simulation package for two sets of UTP and LTP values and demonstrate its working.
5. a) Design and construct a rectangular waveform generator (OpAmp relaxation oscillator) for given frequency and demonstrate its working.
b) Design and implement a rectangular waveform generator (OpAmp relaxation oscillator) using a simulation package and demonstrate the change in frequency when all resistor values are doubled.
7. a) Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC.
b) Design and develop the Verilog /VHDL code for an 8:1
multiplexer. Simulate and verify its working.
8. a) Realize a J-K Master / Slave Flip-Flop using NAND gates and verify its truth table.
b) Design and develop the Verilog / VHDL code for D Flip-Flop with positive-edge triggering. Simulate and verify its working.
9. a) Design and implement a mod-n (n8) synchronous up counter using J-K Flip-Flop ICs and demonstrate its working.
b) Design and develop the Verilog / VHDL code for mod-8 up counter. Simulate and verify its working.
10. a) Design and implement a ring counter using 4-bit shift register and demonstrate its working.
b) Design and develop the Verilog / VHDL code for switched tail counter. Simulate and verify its working.
11. Design and implement an asynchronous counter using decade counter IC to count up from 0 to n (n=9) and demonstrate its working.
12. Design and construct a 4-bit R-2R ladder D/A converter using OpAmp. Determine its accuracy and resolution.
Unit-I: NUMERICAL METHODS - 1 Numerical solution of ordinary differential equations of first order and first degree; Picard’s method, Taylor’s series method, modified Euler’s method, Runge-kutta method of fourth-order. Milne’s and Adams - Bashforth predictor and corrector methods (No derivations of formulae).
[6 hours] Unit-II: NUMERICAL METHODS – 2 Numerical solution of simultaneous first order ordinary differential equations: Picard’s method, Runge-Kutta method of fourth-order.
Numerical solution of second order ordinary differential equations: Picard’s method, Runge-Kutta method and Milne’s method.
[6 hours] Unit-III: Complex variables – 1 Function of a complex variable, Analytic functions-Cauchy-Riemann equations in cartesian and polar forms. Properties of analytic functions.
Application to flow problems- complex potential, velocity potential, equipotential lines, stream functions, stream lines.
[7 hours] Unit-IV: Complex variables – 2
Unit-V: SPECIAL FUNCTIONS Solution of Laplace equation in cylindrical and spherical systems leading Bessel’s and Legendre’s differential equations, Series solution of Bessel’s differential equation leading to Bessel function of first kind. Orthogonal property of Bessel functions. Series solution of Legendre’s differential equation leading to Legendre polynomials, Rodrigue’s formula.
[7 hours] Unit-VI: PROBABILITY THEORY - 1
1. B.S. Grewal, Higher Engineering Mathematics, Latest edition, Khanna Publishers
2. Erwin Kreyszig, Advanced Engineering Mathematics, Latest edition, Wiley Publications.
1. B.V. Ramana, Higher Engineering Mathematics, Latest edition, Tata Mc. Graw Hill Publications.
2. Peter V. O’Neil, Engineering Mathematics, CENGAGE Learning India Pvt Ltd.Publishers
UNIT - 8 7 Hours Recurrence Relations: First Order Linear Recurrence Relation, The Second Order Linear Homogeneous Recurrence Relation with Constant Coefficients, The Non-homogeneous Recurrence Relation, The Method of Generating Functions
1. Ralph P. Grimaldi: Discrete and Combinatorial Mathematics, 5th Edition, Pearson Education, 2004.
(Chapter 11, Chapter 12.1 to 12.4, Chapter 13, Chapter 1, Chapter
8.1 to 8.4, Chapter 9 Chapter 10.1 to 10.4).
1. D.S. Chandrasekharaiah: Graph Theory and Combinatorics, Prism, 2005.
2. Chartrand Zhang: Introduction to Graph Theory, TMH, 2006.
Richard A. Brualdi: Introductory Combinatorics, 4th Edition, 3.
Pearson Education, 2004.
4. Geir Agnarsson & Raymond Geenlaw: Graph Theory, Pearson Education, 2007.
UNIT - 4 6 Hours DYNAMIC PROGRAMMING: The General Method, Warshall’s Algorithm, Floyd’s Algorithm for the All-Pairs Shortest Paths Problem, Single-Source Shortest Paths: General Weights, 0/1 Knapsack, The Traveling Salesperson problem.
DECREASE-AND-CONQUER APPROACHES, SPACE-TIMETRADEOFFS: Decrease-and-Conquer Approaches: Introduction, Insertion Sort, Depth First Search and Breadth First Search, Topological Sorting Space-Time Tradeoffs: Introduction, Sorting by Counting, Input Enhancement in String Matching.
UNIT - 7 6 Hours
COPING WITH LIMITATIONS OF ALGORITHMIC POWER:
Branch-and-Bound: Assignment Problem, Knapsack Problem, Traveling Salesperson Problem.
Approximation Algorithms for NP-Hard Problems – Traveling Salesperson Problem, Knapsack Problem UNIT – 8 6 Hours PRAM ALGORITHMS: Introduction, Computational Model, Parallel Algorithms for Prefix Computation, List Ranking, and Graph Problems,
1. Anany Levitin: Introduction to The Design & Analysis of Algorithms, 2nd Edition, Pearson Education, 2007.
(Listed topics only from the Chapters 1, 2, 3, 5, 7, 8, 10, 11).
2. Ellis Horowitz, Sartaj Sahni, Sanguthevar Rajasekaran:
Fundamentals of Computer Algorithms, 2nd Edition, Universities Press, 2007.
(Listed topics only from the Chapters 3, 4, 5, 13)
1. Thomas H. Cormen, Charles E. Leiserson, Ronal L. Rivest, Clifford Stein: Introduction to Algorithms, 3rd Edition, PHI, 2010.
2. R.C.T. Lee, S.S. Tseng, R.C. Chang & Y.T.Tsai: Introduction to the Design and Analysis of Algorithms A Strategic Approach, Tata McGraw Hill, 2005.
1. Sumitabha Das: UNIX – Concepts and Applications, 4th Edition, Tata McGraw Hill, 2006.
(Chapters 1.2, 2, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 18, 19)
1. Behrouz A. Forouzan and Richard F. Gilberg: UNIX and Shell Programming, Cengage Learning, 2005.
2. M.G. Venkateshmurthy: UNIX & Shell Programming, Pearson Education, 2005.
UNIT – I 7 Hours Introduction, Microprocessor Architecture – 1: A Historical Background, The Microprocessor-Based Personal Computer Systems.
The Microprocessor and its Architecture: Internal Microprocessor Architecture, Real Mode Memory Addressing.
UNIT – 2 7 Hours Microprocessor Architecture – 2, Addressing Modes: Introduction to Protected Mode Memory Addressing, Memory Paging, Flat Mode Memory Addressing Modes: Data Addressing Modes, Program Memory Addressing Modes, Stack Memory Addressing Modes UNIT – 3 6 Hours Programming – 1: Data Movement Instructions: MOV Revisited, PUSH/POP, Load-Effective Address, String Data Transfers, Miscellaneous Data Transfer Instructions, Segment Override Prefix, Assembler Details.
Arithmetic and Logic Instructions: Addition, Subtraction and Comparison, Multiplication and Division.
UNIT - 4 6 Hours Programming – 2: Arithmetic and Logic Instructions (continued): BCD and ASCII Arithmetic, Basic Logic Instructions, Shift and Rotate, String Comparisons.
Program Control Instructions: The Jump Group, Controlling the Flow of the Program, Procedures, Introduction to Interrupts, Machine Control and Miscellaneous Instructions.
UNIT 8 7 Hours I/O Interface – 2, Interrupts, and DMA: I/O Interface (continued): The Programmable Peripheral Interface 82C55, Programmable Interval Timer 8254.
Interrupts: Basic Interrupt Processing, Hardware Interrupts: INTR and INTA/; Direct Memory Access: Basic DMA Operation and Definition.
1. Barry B Brey: The Intel Microprocessors, 8th Edition, Pearson Education, 2009.
(Listed topics only from the Chapters 1 to 13)
1. Douglas V. Hall: Microprocessors and Interfacing, Revised 2nd Edition, TMH, 2006.
2. K. Udaya Kumar & B.S. Umashankar : Advanced Microprocessors & IBM-PC Assembly Language Programming, TMH 2003.
3. James L. Antonakos: The Intel Microprocessor Family: Hardware and Software Principles and Applications, Cengage Learning, 2007.
UNIT - 3 6 Hours Input/Output Organization: Accessing I/O Devices, Interrupts – Interrupt Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, Controlling Device Requests, Exceptions, Direct Memory Access, Buses
UNIT - 6 7 Hours Arithmetic: Addition and Subtraction of Signed Numbers, Design of Fast Adders, Multiplication of Positive Numbers, Signed Operand Multiplication, Fast Multiplication, Integer Division, Floating-point Numbers and Operations
UNIT - 8 6 Hours Multicores, Multiprocessors, and Clusters: Performance, The Power Wall, The Switch from Uniprocessors to Multiprocessors, Amdahl’s Law, Shared Memory Multiprocessors, Clusters and other Message Passing Multiprocessors, Hardware Multithreading, SISD, IMD, SIMD, SPMD, and Vector.
1. Carl Hamacher, Zvonko Vranesic, Safwat Zaky: Computer Organization, 5th Edition, Tata McGraw Hill, 2002.
(Listed topics only from Chapters 1, 2, 4, 5, 6, 7)
2. David A. Patterson, John L. Hennessy: Computer Organization and Design – The Hardware / Software Interface ARM Edition, 4th Edition, Elsevier, 2009.
(Listed topics only)
1. William Stallings: Computer Organization & Architecture, 7th Edition, PHI, 2006.
2. Vincent P. Heuring & Harry F. Jordan: Computer Systems Design and Architecture, 2nd Edition, Pearson Education, 2004.